Under normal condition, the OC and OD pins output at high voltage level. When overcharge protection or abnormal charge current are detected, the output voltage of OC pin changes to low voltage while OD pin remains high voltage. On the other hand, when overdischarge protection, discharge overcurrent or short-circuiting are detected, the OC pin remains high voltage while OD pin changes to low voltage from high voltage.

Yes, if battery voltage falls lower than overcharge release voltage (VDD＜VCR), the overcharge condition can be released when the charger is still being connected.

No, the overcharge status will not be released when a charger is still being connected after overcharge detection, even the battery voltage is below than overcharge release voltage (VCR). The overcharge status is released when the CS pin voltage goes over the charge overcurrent detection voltage (VCIP) by removing the charger.

No, the overdischarge condition only can be released by charging the battery. (When it is in the overdischarge condition, the CS pin voltage is pulled up by the internal resistor to VDD in the IC. At this time, power consumption is minimum, which is below 0.1uA. The IC enters into SLEEP MODE”, only charging the battery can relieve this mode.)

The discharge overcurrent threshold is calculated by: IDIP = VDIP / RON. (1)

Where IDIP is the discharge overcurrent threshold current, VDIP is the discharge overcurrent detection voltage, and RON is the sum of internal resistance of M1 and M2 MOSFET.

For example, VDIP is 150mV (typ.), and RON is 50mΩ, Then, IDIP is 3A.

The maximum current for abnormal charge current is calculated by ＩCHA＝︱VCHA︱/ RON﹒   (2)

Where ICHA is the maximum current for abnormal charge current, VCHA is the charger detection voltage. RON is the sum of internal resistance of M1 and M2 MOSFET.

HY2110-AB for instance, VCHA is -0.3V (typ.), and RON is 50mΩ. Then, ICIP is 6A.

The maximum current for charge overcurrent is calculated by ＩCIP＝︱VCIP︱/ RON﹒   (3)

Where ICIP is the maximum current for charge overcurrent, VCIP is the charge overcurrent detection voltage. RON is the sum of internal resistance of M1 and M2 MOSFET.

HY2111-EB for example, VCIP is -0.1V (typ.) and RON is 50mΩ. Then, ICIP is 2A.

After HY2110 series enter into discharge overcurrent condition or load short-circuiting condition, when the impedance between PB+ and PB- is greater than 1.4MΩ (typ.), both conditions will be released.

After HY2111 series enter into discharge overcurrent condition or load short-circuiting condition, when the impedance between PB+ and PB- is higher than [(150mV/VDIP)*450kΩ] (typ.), the discharge overcurrent condition or load short-circuiting condition will be released.

In order to shorten testing time for production, the DS pin can decrease IC’s overcharge delay time within 10ms by connecting it to VDD pin. In normal protection circuit application, it is recommended to suspend the DS pin or connected to the VSS pin.

The normal operation temperature range is -40～85℃.

Yes, PCBs for “0V battery charging function permitted” IC and “0V battery charging function prohibited” IC are interchangeable. The periphery circuits of ICs are the same.

The external resistor (R1) limits current enter the VDD pin and enhances the ESD protection function. The external capacitor (C1) can prevent VDD voltage fluctuation.

No, both of R1 and C1 do not affect the delay time of detection function.

It is advised to set R1 resistance between 100～470Ω. Due to current consumption, R1 should be as small as possible to avoid lowering the overcharge detection accuracy. When a charger is connected in reversed, the current flows from the charger to the IC. At this time, if R1 is connected to high resistance, the voltage between VDD pin and VSS pin may exceed the absolute maximum rating.

R2 resistance should be set between 300Ω～2k.If R2 ascends higher than 2kΩ, the charging current may not be cut off when a high-voltage charger is connected. Please select as large a resistance as possible to prevent current when a charger is connected in reversed.